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AM652X Datasheet(PDF) 129 Page - Texas Instruments |
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AM652X Datasheet(HTML) 129 Page - Texas Instruments |
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129 / 299 page  129 AM6548, AM6528, AM6546 AM6526, AM6527 www.ti.com SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018 Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Specifications Copyright © 2017–2018, Texas Instruments Incorporated Table 5-10. LVCMOS-FS Buffers DC Electrical Characteristics (continued) over recommended operating conditions (unless otherwise noted) PARAMETER Test Conditions MIN TYP MAX UNIT VIL Low-level input threshold 0.55 V VOH High-level output threshold IOH = 100 µA VDDSHV0 - 0.2 V VOL Low-level output threshold IOL = 100 µA 0.2 V IIN Input leakage current. This value represents the maximum current flowing in or out of the pin while the output driver is disabled and the input is swept from VSS to VDD. VI = VDDSHV0 45 µA VI = VSS 1 µA IOZ Total leakage current through the driver/receiver combination, which may include an internal pull-up or pull-down. This value represents the maximum current flowing in or out of the pin while the output driver is disabled, the pull-up or pull-down is inhibited, and the input is swept from VSS to VDD. 45 µA 5.7.1 USBHS Buffers DC Electrical Characteristics NOTE USB0 and USB1 Electrical Characteristics are compliant with Universal Serial Bus Revision 2.0 Specification dated April 27, 2000 including ECNs and Errata as applicable. 5.7.2 SERDES Buffers DC Electrical Characteristics NOTE The PCIe interfaces are compliant with the electrical parameters specified in PCI Express® Base Specification Revision 4.0, February 19, 2014. NOTE USB0 instance is compliant with the USB3.1 SuperSpeed Transmitter and Receiver Normative Electrical Parameters as defined in the Universal Serial Bus 3.1 Specification, Revision 1.0, July 26, 2013. 5.8 VPP Specifications for One-Time Programmable (OTP) eFuses This section specifies the operating conditions required for programming the OTP eFuses and is applicable only for High-Security Devices. Table 5-11. Recommended Operating Conditions for OTP eFuse Programming over operating free-air temperature range (unless otherwise noted) PARAMETER DESCRIPTION MIN NOM MAX UNIT VDD_CORE Supply voltage range for the core domain during OTP operation; OPP NOM (BOOT) See Section 5.4 V VDD_MCU Supply voltage range for the core domain during OTP operation; OPP NOM (BOOT) See Section 5.4 V VPP_CORE Supply voltage range for the eFuse ROM domain during normal operation N/A Supply voltage range for the eFuse ROM domain during OTP programming (1) 1.71 1.8 1.89 V |
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