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WM9714CLGEFL/V Datasheet(PDF) 13 Page - Cirrus Logic |
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WM9714CLGEFL/V Datasheet(HTML) 13 Page - Cirrus Logic |
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13 / 120 page  WM9714L Rev 4.0 13 SIGNAL RISE AND FALL TIMES BITCLK SYNC SDATAIN SDATAOUT trise CLK tfall CLK trise SYNC tfall SYNC trise DIN tfall DIN trise DOUT tfall DOUT Figure 3 Signal Rise and Fall Times (50pF External Load) Test Conditions DBVDD = 3.3V, DCVDD = 3.3V, DGND1 = DGND2 = 0V, TA = -25C to +85C, unless otherwise stated. PARAMETER SYMBOL MIN TYP MAX UNIT BITCLK rise time triseCLK 2 6 ns BITCLK fall time tfallCLK 2 6 ns SYNC rise time triseSYNC 6 ns SYNC fall time tfallSYNC 6 ns SDATAIN rise time triseDIN 2 6 ns SDATAIN fall time tfallDIN 2 6 ns SDATAOUT rise time triseDOUT 6 ns SDATAOUT fall time tfallDOUT 6 ns AC-LINK POWERDOWN SYNC BITCLK SDATAOUT WRITE TO 0X20 DATA PR4 DON'T CARE SDATAIN SLOT 1 SLOT 2 t S2_PDOWN Figure 4 AC-Link Powerdown Timing AC-Link powerdown occurs when PR4 (register 26h, bit 12) is set (see “Power Management”). PARAMETER SYMBOL MIN TYP MAX UNIT End of Slot 2 to BITCLK and SDATAIN low tS2_PDOWN 1.0 s |
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