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AS6200C Datasheet(PDF) 27 Page - ams AG |
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AS6200C Datasheet(HTML) 27 Page - ams AG |
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27 / 35 page  Document Feedback AS6200C Register Description Datasheet • PUBLIC DS000563 • v2-01 • 2018-Apr-13 35 │ 27 6.3.12 Timing Characteristics Figure 29: Serial Interface Timing Diagram Figure 30: Bus Timing Specifications Parameter Symbol Fast Mode High Speed Mode SCL Clock Frequency fSCL 0.001 0.4 0.001 3.4 MHz Bus free time between STOP and START condition tBUF 600 160 ns Hold time after repeated START condition tHDSTA 100 100 ns Repeated START condition setup time tSUSTA 100 100 ns Data in hold time tHDDAT 10 10 ns Data out hold time (1) tDH 100 100 ns Data setup time tSUDAT 100 10 ns SCL clock low period tLOW 1300 160 ns SCL clock high period tHIGH 600 60 ns Clock/Data fall time tF 300 160 ns Clock/Data rise time tR 300 160 ns Clock/Data rise time for SCL ≤100 kHz tR 1000 ns (1) The device will hold the SDA line high for 100 ns during the falling edge of the SCL. SCL SDA STOP START START STOP tBUF tHDSTA tLOW tRISE tHIGH tFALL tSUSTA tSUDAT tHDDAT tSUSTO |
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