TLE9255WLC datasheet(48/100 Pages) INFINEON

No. de pieza	TLE9255WLC

Descripción Electrónicos	HS CAN Transceiver with Partial Networking

PDF	100 Pages

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Fabricante Electrónico	INFINEON [Infineon Technologies AG]

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48 / 100 page

Data Sheet

Rev. 1.02 2018-02-02

TLE9255W

Serial Peripheral Interface

command OR an SPI failure occurs, then the MISO pin is “high” after the CSN pin is “low” and before a clock

starts. Chapter 8.4 defines the conditions for an SPI Error.

8.1

SPI command format

An SPI command consists of:

• MOSI request format

•

MISO response format

Figure 43 shows the SPI command format.

Figure 43

Command Format of the MOSI and MISO register

MOSI Format Frame

The MOSI format frame consists of address bits (Bits 14-8) and data bits (Bits 7-0). The R/W bit (Bit15) defines

a write operation (R/W = 1) or a read (R/W = 0) operation to the addressed register. For read operations the data

bits are not relevant.

MISO Format Frame

The MISO format frame consists of the status information field (Bits 15-8) and the data bits (Bits 7-0). The data

bits contain the data of the addressed register. The status information field contains compressed information

about the Status Register (Chapter 8.3).

Data Bits

MOSI

Address Bits

R/W

Data Bits

MISO

Status Information Field

LSB

MSB

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