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MP2229 Datasheet(PDF) 17 Page - Monolithic Power Systems

No. de pieza MP2229
Descripción Electrónicos  High Efficiency 21V, 6A Synchronous Step-Down Converter with External Sync, Low-Power Mode, and External Soft-Start
PDF  22 Pages
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Fabricante Electrónico  MPS [Monolithic Power Systems]
Página de inicio  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP2229 Datasheet(HTML) 17 Page - Monolithic Power Systems

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MP2229 – 21V, 6A SYNCHRONOUS STEP-DOWN CONVERTER
MP2229 Rev. 1.0
www.MonolithicPower.com
17
2/12/2015
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
External Bootstrap Diode
BST voltage may become insufficient at
particular specs (see conditions below). In
these cases an external bootstrap diode can
enhance the efficiency of the regulator at heavy
load and avoid BST voltage insufficiency during
PFM operation at light load. Insufficient BST
voltage is more likely to happen at either of the
following conditions:
VIN is below 5V
VOUT is 5V or 3.3V; and the duty cycle is
large: D=
IN
OUT
V
V
>65%
In these cases (if insufficient BST voltage
occurs), the output-ripple voltage may become
extremely high during a light-load condition.
Add an external BST diode from VCC to BST
(see Figure 9).
FIGURE 9. Optional Bootstrap Diode
The recommended external BST diode is
IN4148, and the BST capacitor is 0.1µF to 1μF.
PCB Layout Guidelines(10)
Efficient PCB layout is critical to achieve stable
operation. For best results, please refer to
Figure 10 and follow the guidelines below:
1) Keep the connection of input ground and
GND as short and wide as possible.
2) Keep the connection of the input capacitor
and IN as short and wide as possible.
3) Ensure all feedback connections are short
and direct. Place the feedback resistors and
compensation components as close to the chip
as possible.
4) Route SW away from sensitive analog areas
(such as FB).
To improve performance, use a 4-layer board.
Figure 10 shows the top and bottom layer of the
PCB (inner 1 and inner 2 are all GND).
Notes:
10)
The recommended layout is based on the Figure 11
“Typical Application Circuit” on Page19.
Top Layer
GND
VCC
Bottom Layer
FIGURE 10. Recommended PCB Layout



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