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KL5KUSB201 Datasheet(PDF) 14 Page - List of Unclassifed Manufacturers

No. de pieza KL5KUSB201
Descripción Electrónicos  USB2.0 Compliant Transceiver Chip
PDF  21 Pages
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Fabricante Electrónico  ETC [List of Unclassifed Manufacturers]
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KL5KUSB201 Datasheet(HTML) 14 Page - List of Unclassifed Manufacturers

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Kawasaki USB device
KL5KUSB201
Datasheet (digest) rev 1.1E page 14/21
Copyright © 2002 Kawasaki Microelectronics Inc. Kawasaki LSI Inc. All rights reserved.
Figure 7-2 SIE Bus Input Timing
CKOUT (O)
TXACT (I)
TXRDY (O)
SIE_DAT[7:0] (IO)
WDVLD (IO)
SIE_DAT[15:8] (IO)
RXACT (O)
RXVLD (O)
B3
B4
B5
B6
//
//
//
//
//
B2
B1
//
8. USB Bus Timing
8.1 Bulk IN Transaction
Figure 8-1 shows the data timing of a Bulk IN transaction from USB host. When the LSI
receives IN packet from the host PC, it asserts RXACT and drives 3 bytes received
data on SIE bus. External SIE logic receives the data, checks the information of
address, endpoint and CRC if necessary. If it finds the data valid, the SIE returns the
DATA packet to be transmitted. Finally the LSI receives ACK packet and finishes a Bulk
IN transaction.
Figure 8-1 Bulk IN transaction
2'
RXACT (O)
USB Bus (IO)
SE0
IN
SE0
SIE_DAT[7:0] (IO)
SIE_DAT[15:8] (IO)
TXACT (I)
SIE_DAT[7:0] (IO)
SIE_DAT[15:8] (IO)
ep
AE
IN EC
2
DAT
3
4
n-1
n
....
....
D
3' 4'
n' C16
SE0
ep
SE0
ep
AK
....
SYNC
AEC
SYNC
SYNC AK



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