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24LC512 Datasheet(PDF) 3 Page - Microchip Technology

No. de pieza 24LC512
Descripción Electrónicos  512K I2C CMOS Serial EEPROM
PDF  26 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

24LC512 Datasheet(HTML) 3 Page - Microchip Technology

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 2004 Microchip Technology Inc.
DS21754E-page 3
24AA512/24LC512/24FC512
TABLE 1-2:
AC CHARACTERISTICS
AC CHARACTERISTICS
Electrical Characteristics:
Industrial (I):
VCC = +1.8V to 5.5V
TA = -40°C to +85°C
Automotive (E):
VCC = +2.5V to 5.5V
TA = -40°C to +125°C
Param.
No.
Sym
Characteristic
Min
Max
Units
Conditions
1
FCLK
Clock frequency
—
—
—
100
400
1000
kHz
1.8V
≤ VCC < 2.5V
2.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V 24FC512
2
THIGH
Clock high time
4000
600
500
—
—
—
ns
1.8V
≤ VCC < 2.5V
2.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V 24FC512
3
TLOW
Clock low time
4700
1300
500
—
—
—
ns
1.8V
≤ VCC < 2.5V
2.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V 24FC512
4
TR
SDA and SCL rise time (Note 1)
—
—
—
1000
300
300
ns
1.8V
≤ VCC< 2.5V
2.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V 24FC512
5
TF
SDA and SCL fall time (Note 1)
—
—
300
100
ns
All except, 24FC512
2.5V
≤ VCC ≤ 5.5V 24FC512
6
THD:STA
Start condition hold time
4000
600
250
—
—
—
ns
1.8V
≤ VCC < 2.5V
2.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V 24FC512
7
TSU:STA
Start condition setup time
4700
600
250
—
—
—
ns
1.8V
≤ VCC < 2.5V
2.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V 24FC512
8
THD:DAT Data input hold time
0
—
ns
(Note 2)
9
TSU:DAT
Data input setup time
250
100
100
—
—
—
ns
1.8V
≤ VCC < 2.5V
2.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V 24FC512
10
TSU:STO
Stop condition setup time
4000
600
250
—
—
—
ns
1.8V
≤ VCC < 2.5V
2.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V 24FC512
11
TSU:WP
WP setup time
4000
600
600
—
—
—
ns
1.8V
≤ VCC < 2.5V
2.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V 24FC512
12
THD:WP
WP hold time
4700
1300
1300
—
—
—
ns
1.8V
≤ VCC < 2.5V
2.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V 24FC512
13
TAA
Output valid from clock (Note 2)
—
—
—
3500
900
400
ns
1.8V
≤ VCC < 2.5V
2.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V 24FC512
14
TBUF
Bus free time: Time the bus must
be free before a new transmis-
sion can start
4700
1300
500
—
—
—
ns
1.8V
≤ VCC < 2.5V
2.5V
≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V 24FC512
16
TSP
Input filter spike suppression
(SDA and SCL pins)
—
50
ns
All except, 24FC512 (Notes 1 and 3)
17
TWC
Write cycle time (byte or page)
—
5
ms
—
18
—
Endurance
1,000,000
—
cycles
25°C (Note 4)
Note
1:
Not 100% tested. CB = total capacitance of one bus line in pF.
2:
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3:
The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike
suppression. This eliminates the need for a TI specification for standard operation.
4:
This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please
consult the Total Endurance™ Model which can be obtained from Microchip’s web site: www.microchip.com.



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