RAMK033

www.vishay.com

Vishay MCB

Revision: 15-Dec-17

6

Document Number: 32550

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ELECTRICAL INTERFACE DESCRIPTION - VERSION LP

Timing Diagram

OPTIONS

• Other design on request (mechanical interfaces, electrical interfaces, ...)

6 WIRES CONNECTION

PIN

NAME

1Data-

2Data+

3CLK-

4CLK+

5GND

6+5 V

7

Reserved for Vishay MCB Industrie production

8

Reserved for Vishay MCB Industrie production

9

Reserved for Vishay MCB Industrie production

10

Reserved for Vishay MCB Industrie production

SSI PARAMETERS

Output code

Binary

Data differential interface

RS422 according to EIA-RS422

CLK differential interface

RS422 according to EIA-RS422

Minimum clock frequency

300 kHz

Maximum clock frequency

4 MHz

Data frame

17 bits

Data bit (n)

14 bits

Master system

Sensor

+5 V

+5 V

+5 V

+5 V

100

Ω

+5 V

+5 V

GND

+5 V

DATA+

DATA-

CLK-

CLK+

t

1

F

clock

t

≥ 500 ns

t

≤ 200 ns

Start of cycle

End of cycle

CLK+

CLK-

DATA+

0

1

2

14

15

16

DATA-

MSB

LSB