DP83016 datasheet(2/4 Pages) NSC

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Targeted at desktop/workgroup LAN connectivity, the

DP83016 offers new levels of integration and performance

for Gigabit Ethernet switch applications.

The DP83016 maintains the ability to provide non-blocking

wire-speed Gigabit performance on all ports. The internal

switching engine can process 32 Gbit/s and forward 24 mil-

lion packets per second (Mpps).

The scalable and modular design makes it possible to build

a 16-port or 24-port Gigabit switch using only 1 or 2

devices, respectively. Each port can be configured as tri-

speed port for copper PHYs using (R)GMII or for optical

transceivers using (R)TBI.

The on-chip switching engine with filtering/forwarding func-

tions and queueing capabilities eliminates any require-

ments for external memory devices in the system design.

The DP83016 makes unmanaged designs possible by uti-

lizing a low cost micro-controller for configuration and mon-

itoring purposes - this is accomplished using a simple serial

interface.

Additionally, the DP83016 delivers the ability to make man-

aged designs with a 16-bit parallel CPU interface. This

enables

web

based

SNMP

management.

With

enhanced support for routing protocols such as GARP,

GMRP, GVRP and IGMP snooping the DP83016 is an ideal

choice for future switch applications.

The Layer-2 switching engine provides full wire-speed

automatic MAC address learning. The chip also supports

programmable higher layer classification and prioritization

to enable enhanced Quality of Service (QoS) support for

real time applications such as VoIP.

Figure 1. DP83016 Block Diagram

10/100/1000

MAC

Bus_Interface

FIFO

Frame_Bus

Frame_Header_Bus

Analyzer /

Arbiter

CPU_I/F

MII_Mgmt_I/F

Control/Status_Regs

10/100/1000

MAC

Bus_Interface

FIFO

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