EP7209 datasheet(2/128 Pages) CIRRUS

2 / 128 page

EP7209

OVERVIEW (cont.)

FEATURES (cont.)

DS453PP2

The EP7209 also includes a comprehensive set of

integrated peripherals such as an LCD display con-

troller, an audio DAC interface, and a FLASH memory

interface. Using the EP7209, a portable audio

decoder solution can be built with the addition of an

LCD display, an audio DAC, a FLASH memory sub-

system, and a small number of additional low cost

components.

The EP7209 uses its powerful 32-bit RISC process-

ing engine to implement audio decompression algo-

rithms in software. The nature of the on-board RISC

processor and the availability of efficient C-compilers

and other software development tools ensures that a

wide range of audio decompression algorithms can

easily be ported to and run on the EP7209.

The EP7209 uses external memory for storing appli-

cation code. The use of external memory to support

software audio decompression algorithms ensures

that the audio decompression system solution can be

tailored to the requirements of the application. Soft-

ware can be placed in a low cost mask ROM for price

sensitive applications, or can be placed in external

FLASH memory to enable upgradeable systems. The

EP7209’s 8 kbyte on-board cache and programma-

ble wait state generator ensure that a wide range of

memory options can be utilized.

The EP7209 runs a full ISO-compliant MPEG 1, 2, &

2.5 layer 3 audio decompression engine with less

than 50% of its available processing capability. This

leaves significant processing power available for

product differentiation.

MPEG 1, 2, & 2.5 Layer 3 Object Code Library

Cirrus Logic provides an object code library for

enabling MPEG 1, 2, & 2.5 layer 3 audio decompres-

sion. This library supports the MPEG 1 sample rates

of 48 k, 44.1 k and 32 k bits per second; the MPEG 2

sample rates of 24 k, 22.05 k and 16 k bits per sec-

ond; and the MPEG 2.5 sample rates of 12 k,

11.025 k and 8 k bits per second. In addition to all

standard fixed compressed data rates, the MPEG

layer 3 object code library also supports decompres-

sion of variable bit-rate data streams.

s Dynamically programmable clock speeds of 18,

36, 49, and 74 MHz at 2.5 V

s Performance matching 100 MHz Intel®

Pentium-based PC

s OEM customization

— Integrated ARM720T RISC processor

— Up to 25 MHz of CPU processing power available (after

digital audio decoding) for custom features such as soft-

ware EQ or tone control, volume control, spectrum

analyzer, random play order, etc.

— Allows for control of digital voice recorder function

s LCD controller

— Interfaces directly to a single-scan panel monochrome

LCD

— Panel width is programmable from 32 to 1024 pixels in

16-pixel increments

— Video frame buffer size programmable up to 128 kbytes

— Bits per pixel of 1, 2, or 4 bits

s Memory controller

— Decodes up to 6 separate memory segments of up to

256 Mbytes each

— Each segment can be configured as 8, 16, or 32 bits

wide and supports page-mode access

— Programmable access time for conventional

ROM/SRAM/FLASH memory

— Supports Removable FLASH card interface

— Enables connection to removable FLASH card for addi-

tion of expansion FLASH memory modules

s 38,400 bytes (0x9600) of on-chip SRAM for fast

program execution and/or as a frame buffer

s On-chip boot ROM for manufacturing support

s Integrated DAI interface

— Connects directly to a Crystal® audio DAC

s 27-bits of general-purpose I/O

— Three 8-bit and one 3-bit GPIO port

— Supports scanning keyboard matrix

s SIR (up to 115.2 kbps) infrared encoder/decoder

— IrDA (Infrared Data Association) SIR protocol

encoder/decoder

s DC-to-DC converter interface (PWM)

— Provides two 96 kHz clock outputs with programmable

duty ratio (from 1-in-16 to 15-in-16) that can be used to

drive a DC to DC converter

s 208-pin LQFP or 256-ball PBGA packages

s Full JTAG boundary scan and Embedded ICE

support

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