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SL74HC373D Datasheet (PDF) - System Logic Semiconductor

SL74HC373D Datasheet PDF - System Logic Semiconductor
No. de pieza SL74HC373D
Descarga  SL74HC373D Descarga

Tamaño del archivo   53.24 Kbytes
Page   5 Pages
Fabricante Electrónico  SLS [System Logic Semiconductor]
Página de inicio  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor
Descripción Electrónicos Octal 3-State Noninverting Transparent Latch

SL74HC373D Datasheet (PDF)

Go To PDF Page Descarga Datasheet
SL74HC373D Datasheet PDF - System Logic Semiconductor

No. de pieza SL74HC373D
Descarga  SL74HC373D Click to download

Tamaño del archivo   53.24 Kbytes
Page   5 Pages
Fabricante Electrónico  SLS [System Logic Semiconductor]
Página de inicio  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor
Descripción Electrónicos Octal 3-State Noninverting Transparent Latch

SL74HC373D Datasheet (HTML) - System Logic Semiconductor

SL74HC373D Datasheet HTML 1Page - System Logic Semiconductor SL74HC373D Datasheet HTML 2Page - System Logic Semiconductor SL74HC373D Datasheet HTML 3Page - System Logic Semiconductor SL74HC373D Datasheet HTML 4Page - System Logic Semiconductor SL74HC373D Datasheet HTML 5Page - System Logic Semiconductor

SL74HC373D Detalles de producto

Octal 3-State Noninverting Transparent Latch
High-Performance Silicon-Gate CMOS

The SL74HC373 is identical in pinout to the LS/ALS373. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched.
The Output Enable input does not affect the state of the latches, but when Output Enable is high, all device outputs are forced to the high-impedance state. Thus, data may be latched even when the outputs are not enabled.

 • Outputs Directly Interface to CMOS, NMOS, and TTL
 • Operating Voltage Range: 2.0 to 6.0 V
 • Low Input Current: 1.0 μA
 • High Noise Immunity Characteristic of CMOS Devices




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