1.1 Features
 Minimum instruction execution time can be changed
from high speed (0.03125 μs: @ 32 MHz operation with
high-speed on-chip oscillator clock) to ultra low-speed
(30.5 μs: @ 32.768 kHz operation with subsystem clock)
 General-purpose register: 8 bits × 32 registers (8 bits × 8 registers × 4 banks)
 ROM: 24 to 512 KB
 RAM: 2 to 24 KB
 Data flash memory: 8 KB
 On-chip high-speed on-chip oscillator clocks
Select from 32 MHz (TYP.), 24 MHz (TYP.), 16 MHz
(TYP.), 8 MHz (TYP.), and 4 MHz (TYP.)
 On-chip single-power-supply flash memory (with
prohibition of block erase/writing function)
 Self-programming (with boot swap function/flash shield
window function)
 On-chip debug function
 On-chip power-on-reset (POR) circuit and voltage detector (LVD)
 On-chip watchdog timer (operable with the dedicated
low-speed on-chip oscillator clock)
 On-chip multiplier and divider/multiply-accumulator
16 bits × 16 bits = 32 bits (Unsigned or signed)
32 bits ÷ 32 bits = 32 bits (Unsigned)
16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed)
 On-chip clock output/buzzer output controller
 On-chip BCD adjustment
I/O ports: 38 to 112