▪ Dual 1:6 low skew, low additive jitter LVDS fanout
buffers
▪ Matched AC characteristics across both channels
▪ High isolation between channels
▪ Low power consumption
▪ Both differential CLKA, nCLKA and CLKB, nCLKB
inputs accept LVDS, LVPECL and single-ended
LVCMOS levels
▪ Maximum input clock frequency: 2GHz
▪ Output amplitudes: 350mV, 500mV, and disable
(selectable)
▪ Output bank skew: 10ps typical
▪ Output skew: 212ps typical
▪ Low additive phase jitter, RMS: 45fs typical
(fREF = 156.25MHz, 12kHz–20MHz)
▪ Full 1.8V and 2.5V supply voltage mode
▪ Device current consumption (IDD):
• 210mA typical: 1.8V
• 230mA typical: 2.5V
▪ Lead-free (RoHS 6) packaging:
• 40-VFQFPN, 6 × 6 × 0.9 mm
▪ -40°C to 85°C ambient operating temperature
▪ Supports case temperature up to 105°C