1FEATURES
2• 5-Channel (4 data + 1 clock) Channel Link
LVDS Parallel Interface Supports 24-bit Data
3-bit Control at 5 – 50 MHz
• AC Coupled STP Interconnect up to 10 Meters
in Length
• Integrated Serial CML Terminations
• AT–SPEED BIST Mode and Status Pin
• Optional I2C Compatible Serial Control Bus
• Power Down Mode Minimizes Power
Dissipation
• 1.8V or 3.3V Compatible Control Pin Interface
• >8 kV ESD (HBM) Protection
• -40° to +85°C Temperature Range
SERIALIZER – DS92LV0411
• Data Scrambler for Reduced EMI
• DC–Balance Encoder for AC Coupling
• Selectable Output VOD and Adjustable De-
Emphasis
DESERIALIZER – DS92LV0412
• Random Data Lock; No Reference Clock
Required
• Adjustable Input Receiver Equalization
• EMI Minimization on Output Parallel Bus
(Spread Spectrum Clock Generation and LVDS
VOD Select)

APPLICATIONS
• Embedded Video and Display
• Machine Vision, Industrial Imaging, Medical
Imaging
• Office Automation — Printers, Scanners,
Copiers
• Security and Video Surveillance
• General purpose data communication

DESCRIPTION
The DS92LV0411 (serializer) and DS92LV0412
(deserializer) chipset translates a Channel Link LVDS
video interface (4 LVDS Data + LVDS Clock) into a
high-speed serialized interface over a single CML
pair.
The DS92LV0411/DS92LV0412 enables applications
that currently use the popular Channel Link or
Channel Link style devices to seamlessly upgrade to
an embedded clock interface to reduce interconnect
cost or ease design challenges. The parallel LVDS interface also reduces FPGA I/O pins, board trace
count and alleviates EMI issues, when compared to
traditional single-ended wide bus interfaces.
Programmable transmit de-emphasis, receive
equalization, on-chip scrambling and DC balancing
enables longer distance transmission over lossy
cables and backplanes. The Deserializer
automatically locks to incoming data without an
external reference clock or special sync patterns,
providing easy “plug-and-go” operation.
The DS92LV0411 and DS92LV0412 are
programmable though an I2C interface as well as by
pins. A built-in AT-SPEED BIST feature validates link
integrity and may be used for system diagnostics.
The DS92LV0411 and DS92LV0412 can be used
interchangeably with the DS92LV2411 or
DS92LV2412. This allows designers the flexibility to
connect to the host device and receiving devices with
different interface types, LVDS or LVCMOS.