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SN74HCS72 Datasheet (PDF) - Texas Instruments

SN74HCS72 Datasheet PDF - Texas Instruments
No. de pieza SN74HCS72
Descarga  SN74HCS72 Descarga
Tamaño del archivo   686.92 Kbytes
Page   25 Pages
Fabricante Electrónico  TI2 [Texas Instruments]
Página de inicio  https://www.ti.com
Logo TI2 - Texas Instruments
Descripción Electrónicos SN74HCS72-Q1 Automotive Qualified Schmitt-Trigger Input Dual D-Type Negative-Edge-Triggered Flip-Flops With Clear and Preset

SN74HCS72 Datasheet (PDF)

Go To PDF Page Descarga Datasheet
SN74HCS72 Datasheet PDF - Texas Instruments

No. de pieza SN74HCS72
Descarga  SN74HCS72 Click to download

Tamaño del archivo   686.92 Kbytes
Page   25 Pages
Fabricante Electrónico  TI2 [Texas Instruments]
Página de inicio  https://www.ti.com
Logo TI2 - Texas Instruments
Descripción Electrónicos SN74HCS72-Q1 Automotive Qualified Schmitt-Trigger Input Dual D-Type Negative-Edge-Triggered Flip-Flops With Clear and Preset

SN74HCS72 Datasheet (HTML) - Texas Instruments


SN74HCS72 Detalles de producto

1 Features
1• AEC-Q100 Qualified for automotive applications:
– Device temperature grade 1: –40°C to +125°C,
TA
– Device HBM ESD Classification Level 2
– Device CDM ESD Classifcation Level C6
• Wide operating voltage range: 2 V to 6 V
• Schmitt-trigger inputs allow for slow or noisy input
signals
• Low power consumption
– Typical ICC of 100 nA
– Typical input leakage current of ±100 nA
• ±7.8-mA output drive at 5 V

2 Applications
• Convert a momentary switch to a toggle switch
• Input slow edge-rate signals
• Operate in noisy environments
• Enable CAN Controller Power with wake-up
pattern

3 Description
This device contains two independent D-type
negative-edge-triggered flip-flops. All inputs include
Schmitt-triggers, allowing for slow or noisy input
signals. A low level at the preset (PRE) input sets the
output high. A low level at the clear (CLR) input
resets the output low. Preset and clear functions are
asynchronous and not dependent on the levels of the
other inputs. When PRE and CLR are inactive (high),
data at the data (D) input meeting the setup time
requirements is transferred to the outputs (Q, Q) on
the negative-going edge of the clock (CLK) pulse.
Following the hold-time interval, data at the data (D)
input can be changed without affecting the levels at
the outputs (Q, Q).




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