Full Look-Ahead for High-Speed
Operations on Long Words
Input Clamping Diodes Minimize
Transmission-Line Effects
Darlington Outputs Reduce Turn-Off
Time
Arithmetic Operating Modes:
Addition
Subtraction
Shift Operand A One Position
Magnitude Comparison
Plus Twelve Other Arithmetic
Operations
Logic Function Modes:
Exclusive-OR
Comparator
AND, NAND, OR, NOR
Plus Ten Other Logic Operations

description

The LST81 and ‘S181 aro arithmetic logic wits (ALU function generators tht have » complet of 75 equivalent
gates on a manolthic chip. These circuits parform 16 binary arithmetic operations on two 4-bi words 8s shown in
Tables 1 and 2. These operations ar selected by the four function. select nes (50, 51, 52, 53) and include addon,
subtracion, decrement, and suaight transfer. When performing arithmetic manipulations, th internal caries must
be enabled by applying a owovel volage tthe mode control input (M). & ull ary look. ahead scheme s made
availabe in these devices or fest, simultaneous cary generation by means of two cascade. outputs (ons 15 and 17)
for the four bis in the package. When used in conjunction with the SNG4S162 or SN74S182 fu cay look shesd
Gicuits, High-speed arithmetic operations can be performed. The typical addition times shown above lustre the
it ditional time require for odin of longer words whan ful cary look-ahead a employed. The method of
cascading "S182 circuits with these ALUS to provide moltavel ful cary look ahasd is utrated under typical
applications data for the 5182.

14 igh speed i not of importance, a ippe-cary input (Ce) and a rpple-carry output (C.) are avallable. However,
he riope-cary delay has iso been minimized 80 tht arthetc man uations for small word angen can bs performed
without extemal circuitry.