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CS89712 Datasheet(PDF) 151 Page - Cirrus Logic

No. de pieza CS89712
Descripción Electrónicos  HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH 10BASE-T ETHERNET CONTROLLER
PDF  170 Pages
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Fabricante Electrónico  CIRRUS [Cirrus Logic]
Página de inicio  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS89712 Datasheet(HTML) 151 Page - Cirrus Logic

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CS89712
DS502PP2
151
TIMING CHARACTERISTICS
Note:
All SDRAM 36 MHz timings are for SDRAM operation.
The values for 36 MHz assume 1 wait state, the 18 MHz values have 0 wait states.
Characteristics
Symbol
18 MHz
36 MHz
Units
Min
Max
Min
Max
Negative strobe (nCS[0:5]) zero
wait state read access time
tnCSRD
TBD
TBD
TBD
Negative strobe (nCS[0:5]) zero
wait state write access time
tnCSWR
TBD
TBD
TBD
Sequential expansion burst mode
read access time
tEXBST
TBD
TBD
TBD
SDRAM cycle time
tRC
TBD
-
TBD
TBD
Access time from RAS
tRAC
TBD
-
TBD
TBD
RAS precharge time
tRP
TBD
-
TBD
TBD
CAS pulse width
tCAS
TBD
-
TBD
TBD
CAS precharge in page mode
tCP
TBD
-
TBD
TBD
Page mode cycle time
tPC
TBD
-
TBD
TBD
CAS set-up time for auto refresh
tCSR
TBD
-
TBD
TBD
RAS pulse width
tRAS
TBD
-
TBD
TBD



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