PIC16C72-04SLASHSS datasheet(104/288 Pages) MICROCHIP

104 / 288 page

PIC16C7X

DS30390E-page 104

12.1.1

SAMPLING

The data on the RC7/RX/DT pin is sampled three times

by a majority detect circuit to determine if a high or a

low level is present at the RX pin. If bit BRGH

(TXSTA<2>) is clear (i.e., at the low baud rates), the

sampling is done on the seventh, eighth and ninth fall-

ing edges of a x16 clock (Figure 12-3). If bit BRGH is

set (i.e., at the high baud rates), the sampling is done

on the 3 clock edges preceding the second rising edge

after the ﬁrst falling edge of a x4 clock (Figure 12-4 and

Figure 12-5).

FIGURE 12-3: RX PIN SAMPLING SCHEME. BRGH = 0 (PIC16C73/73A/74/74A)

FIGURE 12-4: RX PIN SAMPLING SCHEME, BRGH = 1 (PIC16C73/73A/74/74A)

FIGURE 12-5: RX PIN SAMPLING SCHEME, BRGH = 1 (PIC16C73/73A/74/74A)

baud CLK

x16 CLK

Start bit

Bit0

Samples

Baud CLK for all but start bit

(RC7/RX/DT pin)

RX pin

baud clk

x4 clk

Q2, Q4 clk

Start Bit

bit0

bit1

First falling edge after RX pin goes low

Second rising edge

Samples

2341

RX pin

baud clk

x4 clk

Q2, Q4 clk

Start Bit

bit0

First falling edge after RX pin goes low

Second rising edge

Samples

Baud clk for all but start bit

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