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RM0312 Datasheet(PDF) 205 Page - STMicroelectronics |
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RM0312 Datasheet(HTML) 205 Page - STMicroelectronics |
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205 / 275 page ![]() DocID022352 Rev 3 205/275 RM0312 Serial peripheral interface (SPI) 223 Figure 74. Data clock timing diagram 1. These timings are shown with the LSBFIRST bit reset in the SPI_CR1 register. Frame format Data can be shifted out either MSB-first or LSB-first depending on the value of the LSBFIRST bit in the SPI_CR1 Register. CPOL = 1 CPOL = 0 MSBit Bit 6 Bit 5 Bit 4 Bit3 Bit 2 Bit 1 LSBit MSBit Bit 6 Bit 5 Bit 4 Bit3 Bit 2 Bit 1 LSBit MISO MOSI NSS (to slave) CAPTURE STROBE CPHA =1 CPOL = 1 CPOL = 0 MSBit Bit 6 Bit 5 Bit 4 Bit3 Bit 2 Bit 1 LSBit MSBit Bit 6 Bit 5 Bit 4 Bit3 Bit 2 Bit 1 LSBit MISO MOSI NSS (to slave) CAPTURE STROBE CPHA =0 |
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