AT90PWM2 datasheet(222/365 Pages) ATMEL

No. de pieza	AT90PWM2

Descripción Electrónicos	High Performance, Low Power Atmel

PDF	365 Pages

Scroll/Zoom	100%

Fabricante Electrónico	ATMEL [ATMEL Corporation]

Página de inicio	http://www.atmel.com

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4317K–AVR–03/2013

AT90PWM2/3/2B/3B

Figure 19-6. 9 bits communication data access

19.6.2.3

UDR/EUDR data access from 13 to 17 bits per character

When the EUSART is used in 13, 14, 15, 16 or 17 bits per character mode, the EUDR/UDR reg-

isters are used in combinaison with the RxB8/TxB8 bit for data access.

For 13, 14, 15 or 16 bit character the upper unused bits in EUDR will be ignored by the Transmit-

ter and set to zero by the Receiver. In transmitter mode, the data should be written MSB first.

The data transmission starts when the UDR register is written.

In these modes, the RxB8/TxB8 registers are not used.

Figure 19-7. 13, 14, 15 and 16 bits communication data access

For 17 bit character the seventeenth bit is locate in RxB8 or TXB8 register. In transmitter mode,

the data should be written MSB first. The data transmission starts when the UDR register is

written.

Figure 19-8. 17 bits communication data access

Data 8:0

UDR

EUDR

Data 15:0

UDR

EUDR

Data 16:0

UDR

EUDR

RxB8 (receive)

or TxB8 (transmit)

AT90PWM2 Datasheet(PDF) 222 Page - ATMEL Corporation