ML7344J datasheet(130/151 Pages) ETC2

No. de pieza	ML7344J

Descripción Electrónicos	Sub-GHz band short range wireless transceiver IC

PDF	151 Pages

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Fabricante Electrónico	ETC2 [List of Unclassifed Manufacturers]

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130 / 151 page

FEDL7344C/E/J-04

ML7344C/E/J

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(4) PLL unlock detection

○TX

During TX, if PLL unlock is detected, PLL unlock interrupt (INT[2] group1) will be generated. When PLL

unlock interrupt occurs, Force_TRX_OFF is automaticcally issued and move to IDLE state. SET_TRX[3:0]

([RF_STATUS: B0 0x0B(3-0)]) will be written to 0b0011(Force_TRX_OFF). PLL unlock might be occurred

when VCO calibration value is not correct. Please confirm VCO calibration or perform VCOcalibration again.

After PLL unlock interrupt occurs, max. 147 μs is necessary to move to IDLE state. Please wait for at least

147μs before next TX, RX or VCO calibration is performed.

Next packet TX?

Yes

PLL unlock (INT[12])?

[INT_SOURCE_GRP1:B0 0x0D(2)]

Normal TX

(To TX flowchart)

Yes

END

INT[12] clear

[INT_SOURCE_GRP1:B0 0x0D(2)]

TX_ON issue

[RF_STATUS:B0 0x0B]

Wait TRX_OFF(IDLE)

(147μsec)

Write TX data

[WR_TX_FIFO:B0 0x7C]

* Force_TRX_OFF is issued

automatically

START

ML7344J Datasheet(PDF) 130 Page - List of Unclassifed Manufacturers