STM32F217VG datasheet(173/175 Pages) STMICROELECTRONICS

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DocID17050 Rev 9

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STM32F21xxx

Revision history

174

04-Nov-2013

Updated Section 3.14: Power supply schemes, Section 3.15: Power

supply supervisor, Section 3.16.1: Regulator ON and Section 3.16.2:

Regulator OFF. Added Section 3.16.3: Regulator ON/OFF and internal

reset ON/OFF availability.

Restructured RTC features and added reference clock detection in

Section 3.17: Real-time clock (RTC), backup SRAM and backup

registers.

Added note indicating the package view below Figure 9: STM32F21x

LQFP64 pinout, Figure 10: STM32F21x LQFP100 pinout, Figure 11:

STM32F21x LQFP144 pinout, and Figure 12: STM32F21x LQFP176

pinout.

Added Table 6: Legend/abbreviations used in the pinout table.

Table 7: STM32F21x pin and ball definitions: content reformatted,

removed indeces on VSS and VDD, updated PA4, PA5, PA6, PC4,

BOOT0; replaced DCMI_12 by DCMI_D12, ETH_MII_RX_D0 by

ETH_MII_RXD0, ETH_MII_RX_D1 by ETH_MII_RXD1,

ETH_RMII_RX_D0 by ETH_RMII_RXD0, and ETH_RMII_RX_D1 by

ETH_RMII_RXD1 in .

Table 9: Alternate function mapping: replaced FSMC_BLN1 by

FSMC_NBL1, added EVENTOUT as AF15 alternated fucntion for

PC13, PC14, PC15, PH0, PH1, and PI8.

Updated Figure 15: Pin loading conditions and Figure 16: Pin input

voltage.

Added VIN in Table 13: General operating conditions.

Removed note applying to VPOR/PDR minimum value in Table 18:

Embedded reset and power control block characteristics.

Updated notes related to CL1 and CL2 in Section : Low-speed external

clock generated from a crystal/ceramic resonator.

Updated conditions in Table 40: EMS characteristics. Updated

Table 41: EMI characteristics. Updated VIL, VIH and VHys in Table 45:

I/O static characteristics. Added Figure : Output driving current and

updated Figure 36: I/O AC characteristics definition.

Updated VIL(NRST) and VIH(NRST) in Table 48: NRST pin

characteristics, updated Figure 36: I/O AC characteristics definition.

Removed tests conditions in Section : I2C interface characteristics.

Updated Table 51: I2C characteristics and Figure 38: I2C bus AC

waveforms and measurement circuit.

Updated IVREF+ and IVDDA in Table 65: ADC characteristics.

Updated Offset comments in Table 67: DAC characteristics.

Updated minimum th(CLKH-DV) value in Table 77: Synchronous non-

multiplexed NOR/PSRAM read timings.

Table 93. Document revision history (continued)

Date

Revision

Changes

STM32F217VG Datasheet(PDF) 173 Page - STMicroelectronics

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