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OMAP3530ECBBA Datasheet(PDF) 146 Page - Texas Instruments

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No. de pieza OMAP3530ECBBA
Descripción Electrónicos  OMAP3530/25 Applications Processor: OMAP 3 Architecture
PDF  264 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

OMAP3530ECBBA Datasheet(HTML) 146 Page - Texas Instruments

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4.3.4
DPLL and DLL Noise Isolation
OMAP Device
DPLL_MPU
DPLL_IVA
DPLL_CORE
DLL
DPLL5
DPLL4
vdds_dpll_dll
vdds_dpll_per
C
NoiseFilter
C
NoiseFilter
030-017
OMAP3530/25 Applications Processor
SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009
www.ti.com
The DPLL and DLL require dedicated power supply pins to isolate the core analog circuit from the
switching noise generated by the core logic that can cause jitter on the clock output signal. Guard rings
are added to the cell to isolate it from substrate noise injection.
The vdd supplies are the most sensitive to noise; decoupling capacitance is recommended below the
supply rails. The maximum input noise level allowed is 30 mVPP for frequencies below 1 MHz.
Figure 4-10 illustrates an example of a noise filter.
Figure 4-10. DPLL and DLL Noise Filter
Table 4-21 specifies the noise filter requirements.
Table 4-21. DPLL and DLL Noise Filter Requirements
NAME
MIN
TYP
MAX
UNIT
Filtering capacitor
100
nF
(1) The capacitors must be inserted between power and ground as close as possible.
(2) This circuit is provided only as an example.
(3) The filter must be located as close as possible to the device.
(4) No filtering required if noise is below 10 mVPP.
CLOCK SPECIFICATIONS
146
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