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M68ICS08GR Datasheet(PDF) 227 Page - Freescale Semiconductor, Inc |
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M68ICS08GR Datasheet(HTML) 227 Page - Freescale Semiconductor, Inc |
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227 / 408 page ![]() Input/Output Ports (I/O) Port E MC68HC908GR8 — Rev 4.0 Technical Data MOTOROLA Input/Output Ports (I/O) 227 Figure 16-19. Port E I/O Circuit When bit DDREx is a logic 1, reading address $0008 reads the PTEx data latch. When bit DDREx is a logic 0, reading address $0008 reads the voltage level on the pin. The data latch can always be written, regardless of the state of its data direction bit. Table 16-6 summarizes the operation of the port E pins. READ DDRE ($000C) WRITE DDRE ($000C) RESET WRITE PTE ($0008) READ PTE ($0008) PTEx DDREx PTEx Table 16-6. Port E Pin Functions DDRE Bit PTE Bit I/O Pin Mode Accesses to DDRE Accesses to PTE Read/Write Read Write 0 X(1) Input, Hi-Z(2) DDRE1–DDRE0 Pin PTE1–PTE0(3) 1 X Output DDRE1–DDRE0] PTE1–PTE0 PTE1–PTE0 Notes: 1. X = Don’t care 2. Hi-Z = High impedance 3. Writing affects data register, but does not affect input. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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