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910GL Datasheet(PDF) 225 Page - Intel Corporation |
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910GL Datasheet(HTML) 225 Page - Intel Corporation |
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225 / 426 page ![]() Functional Description R Datasheet 225 Figure 12-1. System Memory Styles Sys_Mem_Styles Single Channel CL CL CL Dual Channel Interleaved (channels do not have to match) Dual Channel Asymmetric (channels do not have to match) CH B CH A CH B CH A CH B CH A 00 Scheme XOR Bit 6 => CL CH A or CH B CH B CH A TOM TOM CH B0 CH A TOM CH A0 CH B TOM Table 12-1. Sample System Memory Organization with Interleaved Channels Rank Channel A population Cumulative top address in Channel A Channel B population Cumulative top address in Channel B 3 0 MB 2560 MB 0 MB 2560 MB 2 256 MB 2560 MB 256 MB 2560 MB 1 512 MB 2048 MB 512 MB 2048 MB 0 512 MB 1024 MB 512 MB 1024 MB Table 12-2. Sample System Memory Organization with Asymmetric Channels Rank Channel A population Cumulative top address in Channel A Channel B population Cumulative top address in Channel B 3 0 MB 1280 MB 0 MB 2560 MB 2 256 MB 1280 MB 256 MB 2560 MB 1 512 MB 1024 MB 512 MB 2304 MB 0 512 MB 512 MB 512 MB 1792 MB |
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