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KS0073 Datasheet(PDF) 20 Page - Samsung semiconductor |
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KS0073 Datasheet(HTML) 20 Page - Samsung semiconductor |
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20 / 78 page  S6A0073 34COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 20 Timing Generation Circuit Timing generation circuit generates clock signals for the internal operations. Address Counter (AC) Address Counter(AC) stores DDRAM/CGRAM/SEGRAM address, transferred from IR. After writing into (reading from) DDRAM/CGRAM/SEGRAM, AC is automatically increased (decreased) by 1. When RS = "Low" and R/W = "High", AC can be read through DB0-DB6 ports. Cursor/Blink Control Circuit It controls cursor/blink ON/OFF and black/white inversion at cursor position. LCD Driver Circuit LCD Driver circuit has 34 common and 60 segment signals for LCD driving. Data from SEGRAM/CGRAM/CGROM is transferred to 60-bit segment latch serially, which is then stored to a 60-bit shift latch. When each com is selected by 34-bit common register, segment data also output through segment driver from 100-bit segment latch. In case of 1-line display mode, COM0 - COM17 have a 1/17 duty ratio, and in 2-line or 4-line mode, COM0-COM33 have a 1/33 duty ratio. |
Número de pieza similar - KS0073 |
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Descripción similar - KS0073 |
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