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M38044FFHKP Datasheet(PDF) 121 Page - Renesas Technology Corp

No. de pieza M38044FFHKP
Descripción Electrónicos  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
PDF  387 Pages
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
Página de inicio  http://www.renesas.com
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M38044FFHKP Datasheet(HTML) 121 Page - Renesas Technology Corp

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1-103
REJ09B0212-0100Z
Rev.1.00
Jan 14, 2005
3804 Group (Spec.H)
HARDWARE
FUNCTIONAL DESCRIPTION SUPPLEMENT
A/D Converter
A/D conversion is started by setting AD conversion completion bit
to “0”. During A/D conversion, internal operations are performed
as follows.
1. After the start of A/D conversion, AD conversion register
goes to “0016”.
2. The highest-order bit of AD conversion register is set to
“1”. and the comparison voltage Vref is input to the
comparator. Then, Vref is compared with analog input voltage
VIN.
3. As a result of comparison, when Vref < VIN, the highest-
order bit of AD conversion register becomes “1.” When
Vref > VIN, the highest-order bit becomes “0.”
By repeating the above operations up to the lowest-order bit of the
AD conversion register, an analog value converts into a digital
value.
In the 10-bit A/D mode, A/D conversion completes at 61 cycles of
2tc(XIN)* (15.25
µs at f(XIN) = 8.0 MHz) after it is started. In the 8-
bit A/D mode, A/D conversion completes at 50 cycles of 2tc(XIN)
(12.5
µs at f(XIN) = 8.0 MHz) after it is started. And the result of
the conversion is stored into the AD conversion register.
Concurrently with the completion of A/D conversion, the A/D con-
version completion bit is set to “1” and an A/D conversion interrupt
request occurs, so that the AD conversion interrupt request bit is
set to “1”.
* tc(XIN) = Main clock input cycle time
When n = 0
Vref = 0
When n = 1 to 1023
Vref =
✕ n
n : Value of A/D converter (decimal numeral)
VREF
1024
✽1–✽10: A result of the first to tenth comparison
Table 22 Change of AD conversion register during A/D conversion (at 10-bit A/D mode)
At start of conversion
First comparison
Second comparison
Third comparison
After completion of
tenth comparison
0
0
VREF
2
±
Change of AD conversion register
Value of comparison voltage (Vref)
••
••
••
Table 20 Relative formula for a reference voltage VREF of A/D converter and Vref (at 10-bit A/D mode)
0
0
0
0
000
0
0
10
0
00
0
0
0
0
0
10
0
0
0
0
0
0
0
1
11
0
0
0
0
0
0
20
VREF
2
VREF
2
±
VREF
4
VREF
4
±
VREF
8
VREF
2
±
VREF
4
±
••• ±
VREF
1024
A result of A/D conversion
13
45
6
7
8
9
2
10
✽✽
✽✽
When n = 0
Vref = 0
When n = 1 to 255
Vref =
✕ (n – 0.5)
n : Value of A/D converter (decimal numeral)
VREF
256
Table 21 Relative formula for a reference voltage VREF of A/D converter and Vref (at 8-bit A/D mode)



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