M38041FFHKP datasheet(158/387 Pages) RENESAS

158 / 387 page

2-34

APPLICATION

2.3 Timer

Rev.1.00 Jan 14, 2005

REJ09B0212-0100Z

3804 Group (Spec.H)

Fig. 2.3.17 Control procedure

RESET

Initialization

SEI

IREQ1

ICON1

T12XCSS

PREX

CLI

256 – 1

Main processing

PREX

IREQ1

256 – 1

Clock stop ?

RTI

(address 002316)

(address 003C16), bit4

(address 003E16), bit4

(address 002416)

(address 002516)

(address 003C16), bit4

CLT (Note 2)

CLD (Note 3)

Push registers to stack

(address 000E16)

(address 002416)

(address 002516)

(address 002316),

bit3

(Note 1)

Timer X interrupt process routine

Clock count up (1/4 second to year)

Pop registers

XXXX1X002

•All interrupts disabled

•Timer X : Timer mode

•Clear Timer X interrupt request bit

•Timer X interrupt enabled

•Timer X count source : f(XIN)/16

•Set “division ratio – 1” to Prescaler X and Timer X

•Timer X count start

•Interrupts enabled

•Reset Timer to restart count from 0 second after completion

of clock set

Note 1: Perform procedure for completion of clock set only

when completing clock set.

Note 2: When using Index X mode flag (T)

Note 3: When using Decimal mode flag (D)

•Push registers used in interrupt process routine

•Judge whether clock stops

•Clock count up

•Pop registers pushed to stack

q x: This bit is not used here. Set it to “0” or “1” arbitrarily.

0011XXXX2

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