M38044F2HKP datasheet(119/387 Pages) RENESAS

119 / 387 page

1-101

REJ09B0212-0100Z

Rev.1.00

Jan 14, 2005

3804 Group (Spec.H)

HARDWARE

FUNCTIONAL DESCRIPTION SUPPLEMENT

Interrupt

The 3804 group (Spec. H) permits interrupts on the basis of 16

sources. It is vector interrupts with a fixed priority system. Accord-

ingly, when two or more interrupt requests occur during the same

sampling, the higher-priority interrupt is accepted first. This priority

is determined by hardware, but variety of priority processing can

be performed by software, using an interrupt enable bit and an in-

terrupt disable flag.

For interrupt sources, vector addresses and interrupt priority, refer

to “Table 19”.

Table 19 Interrupt sources, vector addresses and priority

Interrupt Request

Generating Conditions

Remarks

Interrupt Source

Low

FFFC16

FFFA16

High

FFFD16

FFFB16

Priority

Notes 1: Vector addresses contain interrupt jump destination addresses.

2: Reset function in the same way as an interrupt with the highest priority.

Vector Addresses (Note 1)

Reset (Note 2)

INT0

Timer Z

INT1

Serial I/O1

reception

Serial I/O1

transmission

At reset

At detection of either rising or

falling edge of INT0 input

At timer Z underflow

At detection of either rising or

falling edge of INT1 input

At completion of serial I/O1 data

reception

At completion of serial I/O1

transmission shift or when

transmission buffer is empty

At detection of either rising or

falling edge of SCL or SDA

At timer X underflow

At timer Y underflow

At timer 1 underflow

At timer 2 underflow

At detection of either rising or

falling edge of CNTR0 input

At detection of either rising or

falling edge of SCL or SDA

At detection of either rising or

falling edge of CNTR1 input

At completion of serial I/O3 data

reception

At completion of serial I/O2 data

transmission or reception

At timer Z underflow

At detection of either rising or

falling edge of INT2 input

At completion of data transfer

At detection of either rising or

falling edge of INT3 input

At detection of either rising or

falling edge of INT4 input

At detection of either rising or

falling edge of CNTR2 input

At completion of A/D conversion

At completion of serial I/O3

transmission shift or when

transmission buffer is empty

At BRK instruction execution

Non-maskable

External interrupt

(active edge selectable)

External interrupt

(active edge selectable)

Valid when serial I/O1 is selected

FFF816

FFF616

FFF416

FFF216

FFF016

FFEE16

FFEC16

FFEA16

FFF916

FFF716

FFF516

FFF316

FFF116

FFEF16

FFED16

FFEB16

External interrupt

(active edge selectable)

SCL, SDA

Timer X

Timer Y

Timer 1

Timer 2

CNTR0

SCL, SDA

CNTR1

Serial I/O3

reception

Serial I/O2

Timer Z

INT2

STP release timer underflow

External interrupt

(active edge selectable)

External interrupt

(active edge selectable)

External interrupt

(active edge selectable)

Valid when serial I/O3 is selected

Valid when serial I/O2 is selected

External interrupt

(active edge selectable)

External interrupt

(active edge selectable)

External interrupt

(active edge selectable)

External interrupt

(active edge selectable)

Valid when serial I/O3 is selected

Non-maskable software interrupt

FFE916

FFE816

I2C

INT3

INT4

CNTR2

A/D converter

Serial I/O3

transmission

BRK instruction

FFE716

FFE516

FFE316

FFE116

FFDF16

FFDD16

FFE616

FFE416

FFE216

FFE016

FFDE16

FFDC16

M38044F2HKP Datasheet(PDF) 119 Page - Renesas Technology Corp

M38044F2HKP Datasheet(HTML) 119 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL