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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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M38041F2HKP Datasheet(PDF) 263 Page - Renesas Technology Corp |
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M38041F2HKP Datasheet(HTML) 263 Page - Renesas Technology Corp |
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263 / 387 page  2-139 APPLICATION 2.9 Watchdog timer Rev.1.00 Jan 14, 2005 REJ09B0212-0100Z 3804 Group (Spec.H) 2.9 Watchdog timer This paragraph explains the registers setting method and the notes relevant to the watchdog timer. 2.9.1 Memory map Fig. 2.9.1 Memory map of registers relevant to watchdog timer 2.9.2 Relevant registers Fig. 2.9.2 Structure of Watchdog timer control register CPU mode register (CPUM) Watchdog timer control register (WDTCON) 003B16 001E16 Address Watchdog timer control register b7 b6 b5 b4 b3 b2 b1 b0 Watchdog timer control register (WDTCON: address 001E16) b 6 0 STP instruction disable bit Watchdog timer H count source selection bit 0: STP instruction enabled 1: STP instruction disabled 0: Watchdog timer L underflow 1: f(XIN)/16 or f(XCIN)/16 Functions Name At reset R W 7 0 0 1 1 1 2 1 3 1 4 1 5 1 ✕ ✕ ✕ ✕ ✕ ✕ Watchdog timer H (for read-out of high-order 6 bit) |
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