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SH7721 Datasheet(PDF) 146 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 146 Page - Renesas Technology Corp |
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146 / 1524 page  Section 3 DSP Operating Unit Rev. 3.00 Jan. 18, 2008 Page 84 of 1458 REJ09B0033-0300 Table 3.2 Virtual Address Space Address Range Name Protection Description H'A5000000 to H'A5FFFFFF P2/Uxy Privileged or DSP 16-Mbyte physical address space, non-cacheable, non-address translatable Can be accessed in privileged mode, privileged DSP mode, and user DSP mode 3.2.3 CPU Register Sets In DSP mode, the status register (SR) in the CPU unit is extended to add control bits and three control registers: a repeat start register (SR), repeat end register (RE), and modulo register (MOD) are added as control registers. 31 31 31 31 16 15 0 0 0 30 29 28 27 16 15 14 13 12 11 10 9876543210 0 MD RB BL RC[11:0] 0 0 0 DSP DMY DMX M Q I3 I2 I1 I0 RF1 RF0 S T ME MS RS RE Repeat start register (RS) Status Register (SR) Repeat end register (RE) MODulo register (MOD) Figure 3.2 CPU Registers in DSP Mode |
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