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SH7721 Datasheet(PDF) 103 Page - Renesas Technology Corp

No. de pieza SH7721
Descripción Electrónicos  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  1524 Pages
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
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SH7721 Datasheet(HTML) 103 Page - Renesas Technology Corp

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Section 2
CPU
Rev. 3.00 Jan. 18, 2008 Page 41 of 1458
REJ09B0033-0300
Notes: 1. To access an on-chip I/O mapped into area 1 in the external memory space, access the
address from the P2 area which is not cached in the virtual address space.
2. If the address translation unit is enabled, arbitrary mapping in page units can be
specified. For details, refer to section 4, Memory Management Unit (MMU).
P0 area
Privileged mode
User mode
External memory space
Area 0
Area 1
Area 2
Area 3
Area 4
Area 5
Area 6
Area 7
H'0000 0000
H'0000 0000
H'8000 0000
H'FFFF FFFF
H'8000 0000
H'A000 0000
H'C000 0000
H'E000 0000
H'FFFF FFFF
U0 area
Address error
P1 area
P2 area
P3 area
P4 area
Figure 2.2
Virtual Address to External Memory Space Mapping



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