SH7708 datasheet(285/633 Pages) RENESAS

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CKIO

CKE

CSn

RAS

CASxx

RD/

TRr

TRrw

(Tpc)

Figure 10.30 Synchronous DRAM Auto-Refresh Timing

2. Self-Refreshing

Self-refresh mode is a kind of standby mode in which the refresh timing and refresh addresses are

generated within the synchronous DRAM. Self-refreshing is activated by setting both the RMODE

bit and the RFSH bit to 1. The self-refresh state is maintained while the CKE signal is low.

Synchronous DRAM cannot be accessed while in the self-refresh state. Self-refresh mode is

cleared by clearing the RMODE bit to 0. After self-refresh mode has been cleared, command

issuance is disabled for the number of cycles specified by the TPC bits in MCR. Self-refresh

timing is shown in figure 10.31. Settings must be made so that self-refresh clearing and data

retention are performed correctly, and auto-refreshing is performed at the correct intervals. When

self-refreshing is activated from the state in which auto-refreshing is set, or when exiting standby

mode other than through a power-on reset, auto-refreshing is restarted if RFSH is set to 1 and

RMODE is cleared to 0 when self-refresh mode is cleared. If the transition from clearing of self-

refresh mode to the start of auto-refreshing takes time, this time should be taken into consideration

when setting the initial value of RTCNT. Making the RTCNT value 1 less than the RTCOR value

will enable refreshing to be started immediately.

After self-refreshing has been set, the self-refresh state continues even if the chip standby state is

entered using the SH7708 Series’s standby function, and is maintained even after recovery from

standby mode other than through a power-on reset. For a power-on reset, the bus state controller’s

registers are initialized, thereby clearing the self-refresh state.

SH7708 Datasheet(PDF) 285 Page - Renesas Technology Corp