SH7708 datasheet(164/633 Pages) RENESAS

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Table 8.4

Module

Registers Initialized

Registers Retaining Data

Interrupt controller

—

All registers

Break controller

—

All registers

Bus state controller

—

All registers

On-chip clock pulse generator

—

All registers

Timer unit

TSTR register

Registers other than TSTR

Realtime clock

—

All registers

The procedure for moving to standby mode is as follows:

1. Clear the TME bit in the WDT’s timer control register (WTCSR) to 0 to stop the WDT. Set the

WDT’s timer counter (WTCNT) and the CKS2–CKS0 bits of the WTCSR register to

appropriate values to secure the specified oscillation settling time.

2. When PLL circuit 1 is running in clock modes 3–6, clear the PSTBY and PLLEN bits in the

frequency control register (FRQCR) to 0 to stop PLL circuit 1.

3. After the STBY bit in the STBCR register is set to 1, a SLEEP instruction is executed.

4. Standby mode is entered and the clocks within the chip are halted. The STATUS1 pin output

goes low and the STATUS0 pin output goes high.

8.4.2

Canceling Standby Mode

Standby mode is canceled by an interrupt (NMI, IRL, or on-chip supporting module) or a reset.

Canceling with an Interrupt: The on-chip WDT can be used for hot starts. When the chip detects

an NMI, IRL,*1 or on-chip supporting module (except the interval timer)*2 interrupt, the clock

will be supplied to the entire chip and standby mode canceled after the time set in the WDT’s

timer control/status register has elapsed. The STATUS1 and STATUS0 pins both go low. Interrupt

handling then begins and a code indicating the interrupt source is set in the INTEVT register.

Interrupts are accepted during standby mode even when the BL bit in the SR register is 1.

Immediately after an interrupt is detected, the phase of the clock output of the CKIO pin may be

unstable, until the processor starts interrupt handling. (The canceling condition is that the

IRL3–IRL0 level is higher than the mask level in the I3–I0 bits in the SR register.)

Notes: 1. When the RTC is being used, standby mode can be canceled using IRL3–IRL0.

2. Standby mode can be canceled with an RTC or TMU (only when running on the RTC

clock) interrupt.

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