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H8SX/1663R Datasheet(PDF) 322 Page - Renesas Technology Corp

No. de pieza H8SX/1663R
Descripción Electrónicos  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
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H8SX/1663R Datasheet(HTML) 322 Page - Renesas Technology Corp

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Section 9 Bus Controller (BSC)
Rev. 2.00 Sep. 24, 2008 Page 290 of 1468
REJ09B0412-0200
9.10.10
Controlling Byte and Word Accesses
When 16-bit bus DRAM is used, two CAS signals can be used to control byte and word accesses.
Figures 9.45 and 9.46 show control timing examples with use of two CAS signals (in big endian
format). Figure 9.47 shows an example of connection for control with two CAS signals.
T
p
T
r
T
c1
T
c2
B
φ
Address bus
RAS
LUCAS
LLCAS
WE
OE (RD)
D15 to D8
D7 to D0
High
Row address
Column address
BS
RD/
WR
Figure 9.45 Timing Example of Byte Control with Use of Two CAS Signals
(Write Access with Lowest Bit of Address = B'0, RAST = 0, CAST = 0)



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