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HD6432351 Datasheet(PDF) 278 Page - Renesas Technology Corp |
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HD6432351 Datasheet(HTML) 278 Page - Renesas Technology Corp |
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278 / 1025 page ![]() Section 7 DMA Controller (DMAC) Rev. 3.00 Sep 15, 2006 page 244 of 988 REJ09B0330-0300 Figure 7.7 illustrates operation in repeat mode. Address T Address B Transfer IOAR 1 byte or word transfer performed in response to 1 transfer request Notes: Address T = L Address B = L + (–1)DTID • (2DTSZ • (N–1)) Where : L = Value set in MAR N = Value set in ETCR Figure 7.7 Operation in Repeat mode Transfer requests (activation sources) consist of A/D converter conversion end interrupts, external requests, SCI transmission complete and reception complete interrupts, and TPU channel 0 to 5 compare match/input capture A interrupts. External requests can be set for channel B only. |
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