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H8S2245 Datasheet(PDF) 425 Page - Renesas Technology Corp |
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H8S2245 Datasheet(HTML) 425 Page - Renesas Technology Corp |
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425 / 818 page ![]() Section 10 8-Bit Timers Rev.3.00 Mar. 26, 2007 Page 383 of 772 REJ09B0355-0300 10.6.4 Contention between TCOR Write and Compare Match During the T2 state of a TCOR write cycle, the TCOR write has priority even if a compare match event occurs. Figure 10.12 shows this operation. φ Address TCOR address Internal write signal TCNT TCOR NM T1 T2 TCOR write cycle by CPU TCOR write data N N+1 Compare match signal Prohibited Figure 10.12 Contention between TCOR Write and Compare Match |
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