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H8S2245 Datasheet(PDF) 350 Page - Renesas Technology Corp |
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H8S2245 Datasheet(HTML) 350 Page - Renesas Technology Corp |
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350 / 818 page ![]() Section 9 16-Bit Timer Pulse Unit (TPU) Rev.3.00 Mar. 26, 2007 Page 308 of 772 REJ09B0355-0300 Bit 5—Underflow Interrupt Enable (TCIEU): Enables or disables interrupt requests (TCIU) by the TCFU flag when the TCFU flag in TSR is set to 1 in channels 1 and 2. In channel 0 bit 5 is reserved. It is always read as 0 and cannot be modified. Bit 5 TCIEU Description 0 Interrupt requests (TCIU) by TCFU disabled (Initial value) 1 Interrupt requests (TCIU) by TCFU enabled Bit 4—Overflow Interrupt Enable (TCIEV): Enables or disables interrupt requests (TCIV) by the TCFV flag when the TCFV flag in TSR is set to 1. Bit 4 TCIEV Description 0 Interrupt requests (TCIV) by TCFV disabled (Initial value) 1 Interrupt requests (TCIV) by TCFV enabled Bit 3—TGR Interrupt Enable D (TGIED): Enables or disables interrupt requests (TGID) by the TGFD bit when the TGFD bit in TSR is set to 1 in channel 0. In channels 1, and 2, bit 3 is reserved. It is always read as 0 and cannot be modified. Bit 3 TGIED Description 0 Interrupt requests (TGID) by TGFD bit disabled (Initial value) 1 Interrupt requests (TGID) by TGFD bit enabled Bit 2—TGR Interrupt Enable C (TGIEC): Enables or disables interrupt requests (TGIC) by the TGFC bit when the TGFC bit in TSR is set to 1 in channel 0. In channels 1, and 2, bit 2 is reserved. It is always read as 0 and cannot be modified. Bit 2 TGIEC Description 0 Interrupt requests (TGIC) by TGFC bit disabled (Initial value) 1 Interrupt requests (TGIC) by TGFC bit enabled |
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