H838532H datasheet(328/508 Pages) RENESAS

No. de pieza	H838532H

Descripción Electrónicos	16-Bit Single-Chip Microcomputer H8 Family / H8/300H Super Low Power Series

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Fabricante Electrónico	RENESAS [Renesas Technology Corp]

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Section 10 Serial Communication Interface

Rev. 1.00 May 30, 2008 Page 308 of 484

REJ09B0436-0100

Table 10.7

Relation between n and Clock

SMR Setting

Clock

CKS1

CKS0

w/2

*1/

φ/16

φ/64

Notes: 1.

φw/2 clock in active (medium-speed/high-speed) mode and sleep mode

φw clock in subactive mode and subsleep mode

In subactive or subsleep mode, SCI3 can be operated when CPU clock is

φw/2 only.

10.2.9

Clock Stop Register 1 (CKSTPR1)

—

TFCKSTP TCCKSTP TACKSTP

S31CKSTP S32CKSTP ADCKSTP TGCKSTP

6543210

1111111

R/W

Bit

Initial value

Read/Write

CKSTPR1 is an 8-bit read/write register that performs module standby mode control for peripheral

modules. Only the bits relating to SCI3 are described here. For details of the other bits, see the

sections on the relevant modules.

Bit 6: SCI31 module standby mode control (S31CKSTP)

Bit 6 controls setting and clearing of module standby mode for SCI31.

S31CKSTP

Description

SCI31 is set to module standby mode

SCI31 module standby mode is cleared

(initial value)

Note:

All SCI31 register is initialized in module standby mode.

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