H838532H datasheet(357/508 Pages) RENESAS

No. de pieza	H838532H

Descripción Electrónicos	16-Bit Single-Chip Microcomputer H8 Family / H8/300H Super Low Power Series

PDF	508 Pages

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Fabricante Electrónico	RENESAS [Renesas Technology Corp]

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Section 10 Serial Communication Interface

Rev. 1.00 May 30, 2008 Page 337 of 484

REJ09B0436-0100

15 0

Internal

basic clock

Receive data

(RXD3x)

Start bit

16 clock pulses

8 clock pulses

Synchronization

sampling timing

Data sampling

timing

Figure 10.16 Receive Data Sampling Timing in Asynchronous Mode

Consequently, the receive margin in asynchronous mode can be expressed as shown in equation

(1).

D – 0.5

M ={(0.5 –

) –

– (L – 0.5) F}

× 100 [%]

..... Equation (1)

where

M: Receive margin (%)

N: Ratio of bit rate to clock (N = 16)

D: Clock duty (D = 0.5 to 1.0)

L: Frame length (L = 9 to 12)

F: Absolute value of clock frequency deviation

Substituting 0 for F (absolute value of clock frequency deviation) and 0.5 for D (clock duty) in

equation (1), a receive margin of 46.875% is given by equation (2).

When D = 0.5 and F = 0,

M = {0.5 — 1/(2

× 16)} × 100 [%]

= 46.875%

..... Equation (2)

However, this is only a computed value, and a margin of 20% to 30% should be allowed when

carrying out system design.

H838532H Datasheet(PDF) 357 Page - Renesas Technology Corp