| Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
M32C/8B Datasheet(PDF) 335 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
M32C/8B Datasheet(HTML) 335 Page - Renesas Technology Corp |
|
335 / 406 page ![]() Under development M32C/8B Group 23. Flash Memory Preliminary specification Specifications in this manual are tentative and subject to change. REJ09B0450-0050 Rev.0.50 Oct 31, 2008 Page 318 of 385 23.6.1.2 Status Register The Status Register can be read in EW0 mode. It indicates the operating status of the flash memory and whether an erase or program operation has completed successfully or not. The Status Register value is reflected on bits FMR00, FMR06, and FMR07 in the FMR0 register. After executing the read status register command, program command, block erase command, lock bit program command, or protect bit program command, the flash memory enters read status register mode and the Status Register returns its value by reading any even address in the user ROM area. Table 23.6 shows the Status Register. Table 23.6 Status Register b7 to b0: These bits return the value of 8 low-order bits by reading an even address of the flash memory in 16-bit units. NOTE: 1. Bits FMR07 (SR5) and FMR06 (SR4) become 0 by executing the clear status register command. When the FMR07 (SR5) or FMR06 (SR4) bit is 1, the program command, block erase command, lock bit program command, read lock bit status command, and protect bit program command cannot be accepted by the flash memory. 23.6.1.3 Error Check To confirm whether the program command, block erase command, lock bit program command, or protect bit program command is executed successfully, read bits FMR07 and FMR06 in the FMR0 register after each operation is completed. Table 23.7 lists error types and occurrence conditions. Figure 23.15 shows a flow chart of the error check and handling procedure for each error. Bit in Status Register Bit in FMR0 Register Status Name Description Value after Reset 01 SR0 (b0) − Reserved bit −− − SR1 (b1) − Reserved bit −− − SR2 (b2) − Reserved bit −− − SR3 (b3) − Reserved bit −− − SR4 (b4) FMR06(1) Program status Successfully completed Error 0 SR5 (b5) FMR07(1) Erase status Successfully completed Error 0 SR6 (b6) − Reserved bit −− − SR7 (b7) FMR00 Sequencer status BUSY READY 1 |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |