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AT89C51CC03U-RDTIM Datasheet(PDF) 128 Page - ATMEL Corporation

No. de pieza AT89C51CC03U-RDTIM
Descripción Electrónicos  Enhanced 8-bit MCU with CAN Controller and Flash Memory
PDF  183 Pages
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Fabricante Electrónico  ATMEL [ATMEL Corporation]
Página de inicio  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT89C51CC03U-RDTIM Datasheet(HTML) 128 Page - ATMEL Corporation

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AT89C51CC03
4182B–CAN–09/03
When a transmission is in progress a new data can be queued and sent as soon as
transmission has been completed. So it is possible to transmit bytes without latency,
useful in some applications.
The SPTE bit in SPSCR is set as long as the transmission buffer is free. It means that
the user application can write SPDAT with the data to be transmitted until the SPTE
becomes cleared.
Figure 59 shows a queuing transmission in master mode. Once the Byte 1 is ready, it is
immediately sent on the bus. Meanwhile an other byte is prepared (and the SPTE is
cleared), it will be sent at the end of the current transmission. The next data must be
ready before the end of the current transmission.
Figure 59. Queuing Transmission In Master Mode
In slave mode it is almost the same except it is the external master that start the
transmission.
Also, in slave mode, if no new data is ready, the last value received will be the next data
byte transmitted.
MSB
B6
B5
B4
B3
B2
B1
LSB
MOSI
SCK
MSB
B6
B5
B4
B3
B2
B1
LSB
BYTE 1 under transmission
MSB
B6
B5
B4
B3
B2
B1
LSB MSB
B6
B5
B4
B3
B2
B1
LSB
MISO
Data
Byte 1
Byte 2
Byte 3
SPTE
BYTE 2 under transmission



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