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PSD813F1 Datasheet(PDF) 101 Page - STMicroelectronics |
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PSD813F1 Datasheet(HTML) 101 Page - STMicroelectronics |
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101 / 120 page ![]() Preliminary PSD813F1-A 97 -15 -20 Symbol Parameter Conditions Min Max Min Max Unit tWLQV (PA) WR to Data Propagation Delay (Note 2) 45 55 ns tDVQV (PA) Data to Port A Data Propagation Delay (Note 5) 40 45 ns tWHQZ (PA) WR Invalid to Port A Tri-state (Note 2) 33 35 ns Port A Peripheral Data Mode Write Timing (3.0 V to 3.6 V Versions) Microcontroller Interface – PSD813F1V AC/DC Parameters (3.0 V to 3.6 V Versions) NOTES: 1. RD timing has the same timing as DS, LDS, UDS, and PSEN (in 8031 combined mode) signals. 2. WR timing has the same timing as E, LDS, UDS, WRL, and WRH signals. 3. Any input used to select Port A Data Peripheral Mode. 4. Data is already stable on Port A. 5. Data stable on ADIO pins to data on Port A. -15 -20 Turbo Symbol Parameter Conditions Min Max Min Max Off Unit tAVQV (PA) Address Valid to Data Valid (Note 3) 55 60 Add 20 ns tSLQV (PA) CSI Valid to Data Valid 45 50 Add 20 ns RD to Data Valid (Notes 1 and 4) 40 45 ns tRLQV (PA) RD to Data Valid 8031 Mode 45 50 ns tDVQV (PA) Data In to Data Out Valid 60 65 ns tQXRH (PA) RD Data Hold Time 0 0 ns tRLRH (PA) RD Pulse Width (Note 1) 36 46 ns tRHQZ (PA) RD to Data High-Z (Note 1) 40 45 ns Port A Peripheral Data Mode Read Timing (3.0 V to 3.6 V Versions) |
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