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CAP3001A Datasheet(PDF) 22 Page - Micronas |
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CAP3001A Datasheet(HTML) 22 Page - Micronas |
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22 / 37 page  CAP 3001 A MICRONAS INTERMETALL 22 Pin 39 – QX2/ECLK Crystal pin. This pin has to be connected with the crystal or with an external clock signal. Pin 40 – RESET In the steady state, high level is required at this pin. A low level resets the CAP 3001 A. Pins 41 to 43 – IMDATA, IMCLK, IMIDENT Via these pins the CAP 3001 A sends and receives data to and from the controller. Pin 44 – TEOSC Test purpose. Pin 45 – REFCLK Input for the synthesizer reference frequency. Pins 46 to 48 – TI1, TI2, TI3 Static digital inputs; these signals can be used as a branch condition in the DSP software. If not used, they must be connected to GND. Pin 49 – SCLKO DAI-Bus: serial clock output. Pin 50 – WSO DAI-Bus: word select output; this is a control line to sep- arated left and right channel in the serial DAI stream. Pin 51 – SDOUT DAI-Bus: serial data output. Pin 52 – SDIN2 DAI-Bus: serial data input 2. Pin 53 – ERR DAI-Bus: error input. Pin 54 – SCLKI DAI-Bus: serial clock input. Pin 55 – WSI DAI-Bus: word select input; this is a control line to sepa- rate left and right channel in the serial DAI stream. Pin 56 – SDIN1 DAI-Bus: serial data input 1. Pins 57 to 59 – TO1, TO2, TO3 Digital outputs; the logical state can be defined by the DSP software. Pin 60 – GNDD This pin serves as ground connection for the digital sig- nals. Pin 61 – VSUPD Digital supply voltage. Power is supplied via this pin for the digital circuitry of the CAP 3001 A. Pin 62 – CLKOUT This output is used for clocking external hardware. Pin 63 – TP3 Test purpose. Pin 64 – TP2 Test purpose. Pin 65 – TP4 Test purpose. Pin 66 – TP1 Test purpose. Pin 67 – AMLEVEL Input for the AM field strength information. Pin 68 – MPLEVEL Input for the multipath information. |
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