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IS25LP02GJ-RHLA3 Datasheet(PDF) 140 Page - Integrated Silicon Solution, Inc

No. de pieza IS25LP02GJ-RHLA3
Descripción Electrónicos  SERIAL FLASH MEMORY 166MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  182 Pages
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Fabricante Electrónico  ISSI [Integrated Silicon Solution, Inc]
Página de inicio  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP02GJ-RHLA3 Datasheet(HTML) 140 Page - Integrated Silicon Solution, Inc

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IS25LP02GJ
IS25WP02GJ
Integrated Silicon Solution, Inc.- www.issi.com
140
Rev.A
10/02/2025
8.46 READ BANK ADDRESS REGISTER OPERATION (RDBR: 16h/C8h)
The Read Bank Address Register (RDBR) instruction allows the Bank Address Register contents to be read. RDBR
is used to read only a volatile Bank Address Register.
The instruction code is first shifted in. Then the 8-bit Bank Register is shifted out. It is possible to read the Bank
Address Register continuously by providing multiples of eight bits.
Data is shifted in from SI and data is shifted out from SO in SPI sequence whereas data in and out is via four pins
(IO0-IO3) in QPI sequence.
Figure 8.97 Read Bank Address Register Sequence In SPI Mode
Instruction = 16h/C8h
7
CE#
SCK
SI
3
2
SO
1
0
Data Out
6
5
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Mode 3
Mode 0
4
tV
Figure 8.98 Read Bank Address Register Sequence In QPI Mode
16h/C8h
0
1
Mode 3
Mode 0
2
3
7:4
3:0
CE#
SCK
IO[3:0]
tV
Data Out



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