Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

STM32H533CE Datasheet(PDF) 192 Page - STMicroelectronics

No. de pieza STM32H533CE
Descripción Electrónicos  Arm® Cortex®-M33 32-bit MCUTrustZone® FPU, 375 DMIPS 250 MHz, 512-Kbyte flash, 272-Kbyte RAM, cryptography
PDF  231 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H533CE Datasheet(HTML) 192 Page - STMicroelectronics

Back Button STM32H533CE Datasheet HTML 188Page - STMicroelectronics STM32H533CE Datasheet HTML 189Page - STMicroelectronics STM32H533CE Datasheet HTML 190Page - STMicroelectronics STM32H533CE Datasheet HTML 191Page - STMicroelectronics STM32H533CE Datasheet HTML 192Page - STMicroelectronics STM32H533CE Datasheet HTML 193Page - STMicroelectronics STM32H533CE Datasheet HTML 194Page - STMicroelectronics STM32H533CE Datasheet HTML 195Page - STMicroelectronics STM32H533CE Datasheet HTML 196Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 192 / 231 page
background image
Electrical characteristics
STM32H533xx
192/231
DS14539 Rev 1
Figure 51. SPI timing diagram - Slave mode and CPHA = 1
1. The SS input can be configured to active low or active high.
I2S Interface characteristics
Unless otherwise specified, the parameters given in Table 111 are derived from tests
performed under the ambient temperature, fPCLKx frequency and VDD supply voltage
conditions summarized in Table 20, with the following configuration:
•
Output speed is set to OSPEEDRy[1:0] = 11
•
Capacitive load CL = 30 pF
•
Measurement points are done at CMOS levels: 0.5 VDD
•
I/O compensation cell activated
•
HSLV activated when VDD ≤ 2.7 V
Refer to Section 5.3.14 for more details on the input/output alternate function characteristics
(CK,SD,WS).
MSv69585V2
th(SI)
tc(SCK)
tw(SCKH)
tw(SCKL)
tsu(SS)
ta(SO)
tv(SO)
th(SS)
tdis(SO)
tsu(SI)
SS input
(1)
CPHA=1
CPOL=0
CPHA=1
CPOL=1
MISO output
MOSI input
First bit OUT
Next bits OUT
Last bit OUT
First bit IN
Last bit IN
Next bits IN
th(SO)
Table 111. I2S dynamic characteristics(1)
Symbol
Parameter
Conditions
Min
Max
Unit
fMCK
I2S main clock output
-
-
50
MHz
fCK
I2S clock output
Master transmitter
-
50
Slave transmitter (TX)
-
21
Slave receiver (RX)
-
50



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com