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IS25LE512MG-RMLA2:PTY Datasheet(PDF) 187 Page - Integrated Silicon Solution, Inc |
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IS25LE512MG-RMLA2:PTY Datasheet(HTML) 187 Page - Integrated Silicon Solution, Inc |
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187 / 194 page ![]() IS25LE512MG IS25WE512MG Integrated Silicon Solution, Inc.- www.issi.com 187 Rev. A6 10/02/2025 9.8 POWER-UP AND POWER-DOWN At Power-up and Power-down, the device must be NOT SELECTED until Vcc reaches at the right level. (Adding a simple pull-up resistor on CE# is recommended.) Figure 9.8 Power up timing VCC VCC(max) VCC(min) VWI tVCE Device is fully accessible Chip Selection Not Allowed = Vcc min. to CE# Low Time PU t Symbol Parameter Min. Max Unit tVCE(1) Vcc(min) to CE# Low 500 (2) us tPU(1) Ground to Vcc(min) 2.5 ms VWI(1) Write Inhibit Voltage IS25LE 2.1 V IS25WE 1.5 Note: 1. These parameters are characterized and not 100% tested. |
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