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IS25LE512MG-RLLA2:PTY Datasheet(PDF) 176 Page - Integrated Silicon Solution, Inc

No. de pieza IS25LE512MG-RLLA2:PTY
Descripción Electrónicos  SERIAL FLASH MEMORY 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  194 Pages
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Fabricante Electrónico  ISSI [Integrated Silicon Solution, Inc]
Página de inicio  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LE512MG-RLLA2:PTY Datasheet(HTML) 176 Page - Integrated Silicon Solution, Inc

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IS25LE512MG
IS25WE512MG
Integrated Silicon Solution, Inc.- www.issi.com
176
Rev. A6
10/02/2025
8.71 READ ECC REGISTER OPERATION (RDECC, B3h)
The Read ECC Register (RDECC) instruction provides access to the ECC Register. The instruction is shifted on
SI, then the 48-bit ECC Register data is shifted out on SO from bit 7 of 1st byte.
Register data is coming out continuously until CE# goes High. 1st byte data is coming out again after 6th byte data
when CE# remains Low.
Figure 8.156 Read ECC Register Sequence In SPI Mode
Instruction = B3h
CE#
SCK
SI
SO
0
1
...
7
8
9
...
15
16
17
...
23
...
64
48
...
Mode 3
Mode 0
tV
7
15
14
8
6
...
0
47
46
40
...
...
...
55
1st byte Data Out
2nd byte Data Out
...
6th byte Data Out
Figure 8.157 Read ECC Register In QPI Mode
B3h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0
2
3
4
5
7:0
15:8
...
47:40
...
12
13
1st byte
Data Out
2nd byte
Data Out
6th byte
Data Out



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