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LAN9252V/ML Datasheet(PDF) 281 Page - Microchip Technology |
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LAN9252V/ML Datasheet(HTML) 281 Page - Microchip Technology |
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281 / 329 page ![]() 2015 Microchip Technology Inc. DS00001909A-page 281 LAN9252 12.14.71 SYSTEM TIME DIFFERENCE FILTER DEPTH REGISTER 12.14.72 SPEED COUNTER FILTER DEPTH REGISTER Offset: 0934h Size: 8 bits Bits Description ECAT Type PDI Type Default 7:4 RESERVED RO RO 0h 3:0 Filter depth for averaging the received System Time deviation. Note: A write access resets the System Time Difference Register. R/W RO 4h Offset: 0935h Size: 8 bits Bits Description ECAT Type PDI Type Default 7:4 RESERVED RO RO 0h 3:0 Filter depth for averaging the clock period deviation. Note: A write access resets the internal speed counter filter. R/W RO Ch |
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