MPC8280 datasheet(186/1386 Pages) FREESCALE

No. de pieza	MPC8280

Descripción Electrónicos	PowerQUICC??II Family Reference Manual

PDF	1386 Pages

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Fabricante Electrónico	FREESCALE [Freescale Semiconductor, Inc]

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186 / 1386 page

System Interface Unit (SIU)

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

4-14

Freescale Semiconductor

Figure 4-9. Interrupt Request Masking

4.2.4

Interrupt Vector Generation and Calculation

Pending unmasked interrupts are presented to the core in order of priority. The interrupt vector that allows

the core to locate the interrupt service routine is made available to the core by reading SIVEC. The

interrupt controller passes an interrupt vector corresponding to the highest-priority, unmasked, pending

interrupt. Table 4-3 lists encodings for the six low-order bits of the interrupt vector.

Table 4-3. Encoding the Interrupt Vector

Interrupt Number

Interrupt Source Description

Interrupt Vector

Error (No interrupt)

0b00_0000

1I2C

0b00_0001

SPI

0b00_0010

RISC Timers

0b00_0011

SMC1

0b00_0100

SMC2

0b00_0101

SCCE

SCCM

13 Input (or

SIPNR

Mask

Bit

SIMR

(Other Unmasked Requests)

Request to

the core

Mask

Bit

Event

Bit

13 Event Bits)

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